Monday, July 11, 2011

Power Transistors

Power Transistors
A power transistor is one that is capable of handling 1 W or more of power or drawing 1 A or more of current during normal operation without being damaged. Power transistors are used in such applications as amplification, oscillation, switching, and frequency conversion. The three small-signal transistor geometries adapted as power transistors are: (1) the BJT, (2) the Darlington pair, and (3) the MOSFET.

POWER BJTs

A power BJT has a geometry similar to that of a discrete small-signal transistor. Most power BJTs have vertical geometries, with the bases and emitters grown on top of the substrate, which functions as the collector. There are both NPN and PNP power transistors. In the absence of a universal power BJT design that will perform all power functions equally well, many different variations have been developed to provide a range of electrical and thermal characteristics for different applications. Each design has advantages and disadvantages or tradeoffs. These structural variations can be classed by the number of diffused layers, the use of an epitaxial base, or combinations of these. BJTs can be made with mesa or planar structures. Some common power bipolar structures are:

■ Single-diffused (hometaxial)
■ Double-diffused (mesa, planar, epitaxial mesa, planar mesa, and multiple epitaxial mesa)
■ Triple-diffused (mesa and planar)
■ Epitaxial base (mesa)
■ Multiple epitaxial base (mesa)

A mesa is a raised section of the die, with the emitter and base geometry in relief above the level of the silicon collector substrate. The mesa is formed by selectively chemically etching away all but the corners of a completed double-diffused die. A planar transistor is made in basically the same way as the mesa version, but the collector-base junction terminates under a protective oxide layer at the surface. Power transistors made with these topologies have different voltage ratings, switching speeds, saturation resistances, and leakage currents. The most advanced switching BJTs have multiple epitaxial, doublediffused structures.





Power bipolar transistors are specified by determining the required values for the following parameters:



■ Voltage rating, collector to emitter
■ Current rating of the collector
■ Power rating
■ Switching speed
■ DC current gain
■ Gain-bandwidth product
■ Rise and fall times
■ Safe operating area (SOA)
■ Thermal properties


The popularity of the switching-regulated or switch mode power supply created a demand for power bipolar transistors capable of switching at frequencies in excess of 10 kHz. To qualify for this application, the power transistor must be able to withstand voltage that is typically twice its input voltage. It must also have collector current ratings and safe operating areas that are high enough for the intended application.


A bipolar transistor operated at high power densities is subject to second breakdown failure which occurs when a thermal hot-spot forms within the transistor chip and the emitterto-collector voltage drops 10 to 25 V. Unless power is quickly removed, current concentrates in the small region and temperatures rise until the transistor is damaged or destroyed.


Safe operating area (SOA) is defined by a graph that indicates the ability of a power transistor to sustain simultaneous high currents and high voltages. It is the plot of collector current versus collector-to-emitter voltage. The curve defines, for both steady-state and pulsed operation, the voltage-current boundaries that result from the combined limitations imposed by voltage and current ratings, the maximum allowable dissipation, and the second breakdown limitations of the transistor.

HIGH-ELECTRON-MOBILITY TRANSISTORS (HEMTs)

A high-electron-mobility transistor (HEMT) is a GaAs transistor designed for IC integration. As shown in Fig. 2-13, it is fabricated on a layer of aluminum gallium arsenide (AlGaAs) grown on a GaAs substrate. This heterojunction design improves transistor performance and permits even higher levels of integration than are possible with the MESFET.


 High-electron-mobility transistor (HEMT).

HETEROJUNCTION BIPOLAR TRANSISTORS (HBTs)

A heterojunction bipolar transistor (HBT) is a bipolar GaAs transistor grown on a heterojunction. Heterojunction E/D technology was developed to achieve cost-effective GaAs digital large-scale integrated (LSI) and very large scale integrated (VLSI) devices. The structure, shown in Fig. 2-14, permits high levels of integration. Both HEMTs and HBTs require special processing to achieve precise, sharp heterojunctions.





Gallium-Arsenide Transistors

The geometries of silicon BJTs and MOSFETs have been implemented in gallium arsenide (GaAs) to take advantage of the higher speed and operating frequencies made possible by the substitution of GaAs silicon. Because GaAs is a compound semiconductor material, it does not form natural oxides as silicon does, so this made it necessary to alter the silicon device geometries to devise different manufacturing methods.


Metal semiconductor field-effect transistor (MESFET).

Three different gallium arsenide transistor designs have been developed: (1) metal semiconductor field-effect transistor (MESFET), high-electron-mobility transistor (HEMT), (3) heterojunction bipolar junction transistor (HBT).

METAL SEMICONDUCTOR FIELD-EFFECT TRANSISTORS (MESFETs)

The metal semiconductor field-effect transistor (MESFET) is a widely used discrete and integrated-circuit GaAs transistor geometry. Its structure is similar to that of a MOSFET, but its metal gate is deposited directly on the doped GaAs substrate, as shown in Fig. 2-12, to form a Schottky barrier diode. However, silicon oxides are deposited on the substrate for isolation and insulation. The length of the metallized gate (positioned between the source and drain) is critical in both discrete GaAs transistors and ICs.

Typically 0.5 to 1.0 μm in most discrete transistors, it could be as small as 0.2 μm in ICs. But the gate structure is usually much wider with respect to its length—typically 900 to 1200 μm. MESFETS can have interdigitated structures with multiple gates formed as comblike structures. Ion implantation is favored for doping active regions of MESFETs. A 0.1- to 0.2-μm-thick N-doped region is made for the most common depletion-mode MESFETs (D-MESFETs). The enhancement-mode MESFET (E-MESFET) and the enhancement-mode JFET (E-JFET) are other GaAs transistors that have been developed. Both E-MESFETs and D-MESFETs can be combined in ICs to form enhancement/ depletion-mode (E/D) logic.